1. Field of the Invention
The invention relates to a solid-state imaging device applied to, for example, an image input system, and an imaging apparatus using the same.
2. Description of the Related Art
As an imaging apparatus using a solid-state imaging device, a digital camera, a PC camera, an optical mouse, a portable TV telephone and the like are developed in recent years. These apparatuses require low voltage and low power consumption from the point of increasing the battery operating time or miniaturization, in addition to from the point of image quality. Since a CCD sensor has difficulties in the above points, a MOS-type solid-state imaging device is often applied. The MOS-type solid-state imaging device has characteristics such as single power supply, lower power consumption, system-on-chip, and further has large degree of freedom in reading out. For example, it is possible to output only part of an image (cutting operation) or output image information discontinuously (thinning-out operation).
A MOS-type solid-state imaging device in related arts will be explained with reference to FIG. 6.
In FIG. 6, a MOS-type solid-state imaging device 1 includes a sensor unit 2 in which many unit pixels including photo diodes performing photoelectric conversion and MOS switches are arranged in a matrix state, a vertical scanning circuit 3 and a horizontal scanning circuit 4 driving the sensor unit 2, a CDS (Correlated Double Sampling)/signal holding circuit 5 receiving signals of a row of pixels in the sensor unit 2, an output amplifier 6, a timing generator circuit 7 generating pulses for operating respective units of the vertical scanning circuit 3, the horizontal scanning circuit 4, the CDS/signal holding circuit 5 and the output amplifier 6 and a serial interface 8 (refer to JP-A-2002-209149 (Patent Document 1)).
Vertical scanning lines 10 from the vertical scanning circuit 3 are commonly connected to pixels of respective rows in the sensor unit 2, and vertical scanning pulses φV [φV1, φV2, . . . φVn] are simultaneously supplied from the vertical scanning circuit 3 to pixels of respective rows through the vertical scanning lines 10. Vertical signal lines 11 are commonly connected to pixels of respective columns in the sensor unit 2, and the respective vertical signal lines 11 are connected to a horizontal signal line 12 through the CDS/signal holding circuit 5. The horizontal signal line 12 is connected to the input side of the output amplifier 6. The horizontal scanning circuit 4 supplies horizontal scanning pulses φH[φH1, φH2, . . . φHn] for selecting pixel signals from the CDS/signal holding circuit 5 and outputting them to the horizontal signal line 12 to horizontal switches of the CDS/signal holding circuit 5. Serial data is supplied to the serial interface 8 from the outside. A synchronizing signal and a clock signal are supplied to the serial interface 8 and the timing generator circuit 7 from the outside.
In the above CMOS-type solid-state imaging device 1, the serial interface 8 receives data from the outside, controlling the operation of the timing generator circuit 7 according to the data. The timing generator circuit 7 generates drive pulses for operating the vertical scanning circuit 3, the horizontal scanning circuit 4, the CDS/signal holding circuit 5 and the output amplifier 6 according to data, supplying them to respective units. The sensor unit 2 is scanned by the vertical scanning circuit 3, that is to say, rows of pixels are sequentially selected by the vertical selection pulses φV [φV1, φV2, . . . φVn] from the vertical scanning circuit 3, and pixel signals in the selected (scanned) row are outputted to the CDS/signal holding circuit 5 through the vertical signal lines 11. The CDS/signal holding circuit 5 receives the signals of a row and holds the signals whose offset components peculiar to respective pixels (correspond to fixed-pattern noise components) are subtracted. Then, the horizontal switches are sequentially turned on by the horizontal scanning pulses φH [φH1, φH2, . . . φHn] from the horizontal scanning circuit 4 and pixel signals of a row held in the CDS/signal holding circuit 5 are sequentially read out to the output amplifier 6 through the horizontal signal line 12. The signals are amplified in the output amplifier 6 to be outputted to an output terminal “t out” as analog signals.